The present invention relates to a method of manufacturing semiconductor integrated circuit devices, and, more particularly, to an effective technique applicable to a type of lithography which uses a phase shift mask during exposure processing.
For example, in Japanese Laid-open Patent Publication 83032/1994, in describing a mask having a structure which uses a resist for writing electron beams or a silicon oxide film as a material of a phase shifter of a phase shift mask, the attenuation of the exposure light derived from the light transmittance of a shifter portion in the form of a film is mentioned as a problem. Then, as means for solving this problem, the publication discloses a technique to reduce attenuation of the exposure light at the shifter portion by exposing identical mask patterns of two respective physically separate masks by superposition exposure.
Further, Japanese Laid-open Patent Publication 233429/1999 discloses an exposure technique in which multiple exposures are produced by changing the exposure conditions in accordance with the characteristics of patterns which constitute objects to be exposed.
Further, Japanese Laid-open Patent Publication 111601/1999 discloses a super resolution double scanning exposure technique to solve a problem which occurs when two masks are used in multiple exposure processing, wherein the mask exchanging operation becomes necessary at the time of the exposure processing so that the throughput of the exposure step is lowered and the manufacturing cost is increased, in addition to other problems. In this technique, identical mask patterns are formed on different planar positions of one sheet of a mask and then multiple exposures are performed over the mask patterns by a scanning system exposure processing.
Further, Japanese Laid-open Patent Publication 197126/1993 discloses an exposure technique which arranges shifter patterns which cross each other at different planar positions over the same mask substrate, and then performs a multiple exposure by shifting the shifting patterns which cross each other by a half pitch and transfers a pattern to the crossing region.
Further, Japanese Laid-open Patent Publication 12543/1998 discloses a superposition exposure technique which performs a multiple exposure by shifting patterns which cross each other by a half pitch and transfers a pattern to the crossing region.
Still further, Japanese Laid-open Patent Publication 143085/1999 discloses a multiple exposure technique which performs a multiple exposure by using two-luminous flux and ordinary light and transfers a pattern to the crossing region.
Heretofore, in the manufacture of semiconductor integrated circuit devices, the lithography technique has been used as a method for transferring fine patterns onto a semiconductor wafer. In the lithography technique, a projection exposure apparatus is mainly used and an integrated circuit pattern is formed by transferring a pattern of a photo mask mounted on the projection exposure apparatus onto the semiconductor wafer.
As such projection exposure apparatuses, there exist a stepper which transfers the pattern of the photo mask by a step-and-repeat process and a scanner which scans the photo mask and the semiconductor wafer in opposite directions from each other and continuously transfers slit-like exposure areas. The largest difference between the stepper and the scanner lies in the fact that the stepper transfers the pattern by using the entire surface of a projection lens, while the scanner transfers the pattern by using only a slit-like portion extending in a diameter direction of a projection lens.
By the way, the refinement of patterns constituting the semiconductor integrated circuit devices is achieved by the enhancement of the performance of a reduced size projection exposure apparatus which is mainly used in a lithography step of a process of manufacture of semiconductor integrated circuit devices. However, to further enhance the fine processing of the patterns, it becomes necessary to enlarge the diameter of the numerical aperture NA of the reduced size projection exposure apparatus. Particularly, to obtain a high resolution in the fine hole patterns arranged with high density, it becomes necessary to set the exposure light to have a shorter wavelength and higher NA. However, this requires a huge amount of facility investment, and, hence, it is not realistic to undertake a new facility investment without completing the depreciation of the semiconductor manufacturing device under the current situation in which the fine processing level of the semiconductor integrated circuit devices has been accelerated year by year. Accordingly, recently, in the lithography technique, a photo mask which includes phase information on lights passing through the photo mask, such as a phase shift mask, has been under development. The phase shift mask technique is a technique which enhances the resolution and the focal depth by operating on the phase of light which passes through the photo mask (including a reticle) As such a phase shift mask technique, for example, there exists the Levenson type phase shift mask technique which arranges a phase shifter on one of neighboring light transmission regions and inverts the phases of the lights which pass through both light transmission regions relative to each other and the like.
A groove shifter is a phase shifter which forms recessed portions in a transparent film or a transparent mask substrate or the like which, constitutes a lower layer than a light shielding film over the mask. For example, the phase shifter is formed by digging grooves in the transparent film or the transparent mask substrate exposed from one of neighboring light transmission patterns of the mask such that the phases of lights which pass through the neighboring light transmission patterns are inverted by 180 degrees relative to each other.
The inventors, however, have found that the phase shift mask technique having the above-mentioned groove shifter structure has the following problems.
That is, a first problem is that, along with the refinement of the patterns, the control of the phase difference is required to satisfy a high accuracy. For example, in case KrF excimer laser light is used as the exposure light, the depth of the groove shifter is approximately 245 nm. Assuming that the allowable phase error is 2 degrees, the groove forming amount of the mask substrate is required to satisfy an accuracy of approximately xc2x13 nm. However, the mask substrate is constituted by a glass substrate which is made of quartz or the like, and it is impossible to perform the depth adjustment or the like by the temperature control or the like. Accordingly, it is difficult to form grooves which fall within such a range (accuracy) by using dry etching processing for forming the groove. In this manner, with respect to the phase shift mask having a groove shifter structure, the absolute value control of the phase becomes a large problem.
A second problem is that, in the phase shift mask, due to the mask structure provided for producing the phase difference, the dimensional accuracy of the transfer patterns is lowered. For example, in the groove shifter structure, due to the influence of the side surfaces of groove-formed portions of the mask, the amount of transmitted light is decreased and eventually a difference arises between the dimensions of respective patterns which are transferred by the light passing through a place in which the groove shifter is arranged and the light passing through another place in which the groove shifter is not arranged and which is disposed close to the previous place. To cope with this, in the groove shifter portion, a structure (fine eaves type groove shifter structure) which makes the transparent film or the transparent mask substrate overhang in the groove width direction, so as to have end portions of the light shielding patterns protrude like eaves, is adopted. However, along with the refinement of the transfer patterns, there exists the problem that the dimensional difference between the transfer patterns cannot be eliminated even with the fine eaves type groove shifter structure.
A third problem is that the manufacturing of masks becomes difficult due to the highly accurate absolute value control of phases and the formation of a fine eaves type groove shifter. Further, along with the refinement of the transfer patterns, the mask defect inspection and the mask correction are required to satisfy a high accuracy. Accordingly, the yield rate is decreased.
Accordingly, it is an object of the present invention to provide a technique which can attenuate the absolute value control accuracy of the phase in a mask having a groove shifter structure.
It is another object of the present invention to provide a technique which can enhance the dimensional accuracy of transfer patterns by using a mask having a groove shifter structure.
It is a still another object of the present invention to provide a technique which can attenuate the detected dimensions of the inspection of a mask having a groove shifter structure.
It is a further object of the present invention to provide a technique which can enhance the ease of manufacture of masks having a groove shifter structure.
It is a still further object of the present invention to provide a technique which can enhance the yield in the manufacture of masks having a groove shifter structure.
The above-mentioned objects, other objects and novel features of the present invention will become apparent in view of the description of the specification and the attached drawings.
A brief summary of typical aspects of the invention to be disclosed in the present application will be presented.
That is, the method of manufacturing semiconductor integrated circuit devices according to the present invention, includes a step in which, when transfer regions formed over a mask are exposed to a wafer by an exposure processing, by exposing a plurality of different transfer regions which have identical mask patterns in the mask and have groove shifters arranged opposite from each other when superposed on a same transfer region over the wafer, a given integrated circuit pattern is transferred onto the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern, including a groove shifter formed in a substrate, is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern, including a groove shifter formed in a substrate and having a phase thereof inverted from a phase of the first phase shift mask pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern, including an on substrate thin film groove shifter, is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern, including an on-substrate thin film groove shifter and having a phase thereof inverted from a phase of the first phase shift mask pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern, formed over the same main surface over the same mask substrate as the first phase shift mask pattern and having a phase thereof inverted from a phase of the first phase shift mask pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern, including a fine eaves type groove shifter, is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern including a fine eaves type groove shifter and having a phase thereof inverted from a phase of the first phase shift mask pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, a step in which a second phase shift mask pattern having a phase thereof inverted from a phase of the first phase shift mask pattern is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer, a step in which the first phase shift mask pattern is again exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the main surface of the wafer, and a step in which the second phase shift mask pattern is again exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, in the method of manufacturing semiconductor integrated circuit devices according to the present invention, the second phase shift mask pattern is formed over the same main surface of the same mask substrate as the first phase shift mask pattern.
Further, in the method of manufacturing semiconductor integrated circuit devices according to the present invention, the exposure in at least some steps is performed by scanning exposure.
Further, in the method of manufacturing semiconductor integrated circuit devices according to the present invention, the first and second phase shift mask patterns are of Levenson type.
Further, in the method of manufacturing semiconductor integrated circuit devices according the present invention, mask patterns of the Levenson type are provided for transferring line-and-space patterns.
Further, in the method of manufacturing semiconductor integrated circuit devices according to the present invention, mask patterns of the Levenson type are provided for transferring a plurality of hole patterns.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern, including an auxiliary pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern, including an auxiliary pattern and having a phase thereof inverted from a phase of the first phase shift mask pattern, is exposed by reduced size projection exposure using an ultraviolet light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern, including a groove shifter, is subjected to scanning exposure by reduced size projection exposure using an ultraviolet light as an exposure light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern, including a groove shifter and having a phase thereof inverted from a phase of the first phase shift mask pattern, is subjected to scanning exposure by reduced size projection exposure using an ultraviolet light as an exposure light projected onto the first region of the first main surface of the wafer.
Further, the method of manufacturing semiconductor integrated circuit devices according to the present invention includes a step in which a first phase shift mask pattern is subjected to scanning exposure by reduced size projection using an ultraviolet light as an exposure light projected onto a first region of a first main surface of a wafer, and a step in which a second phase shift mask pattern having a phase thereof inverted from a phase of the first phase shift mask pattern is subjected to scanning exposure by reduced size projection using an ultraviolet light as an exposure light projected onto the first region of the first main surface of the wafer.
Further, a brief summary of other typical features as disclosed in the present application will be presented.
The method of manufacture semiconductor integrated circuit devices according to the present invention includes a step in which a plurality of transfer regions arranged on different planar positions over the same surface of the same mask are exposed onto the same region of the wafer by superposition exposure to transfer a given integrated circuit pattern over the wafer. In performing such a superposition exposure, a plurality of transfer regions which arrange identical mask patterns thereon and have groove shifters arranged such that the respective lights which pass through the same planar position when the transfer regions are superposed have their phases inverted relative to each other are superposed and then an exposure is carried out.
The method of manufacture of semiconductor integrated circuit devices according to the present invention includes a step in which a plurality of transfer regions arranged on different planar positions over the same surface of the same mask are exposed by scanning onto the same region of the wafer by superposition exposure to transfer a given integrated circuit pattern over the wafer. In performing such a superposition exposure, a plurality of transfer regions which arrange identical mask patterns thereon and have groove shifters arranged such that the respective lights which pass through the same planar position when the transfer regions are superposed have their phases inverted relative to each other are superposed and then an exposure is carried out.
The method of manufacture of semiconductor integrated circuit devices according to the present invention includes a step in which a plurality of transfer regions arranged on different planar positions over the same surface of the same mask are exposed by scanning onto the same region of the wafer by superposition exposure to transfer a given integrated circuit pattern over the wafer. In performing such a superposition exposure, a plurality of transfer regions which arrange identical mask patterns thereon and have groove shifters arranged such that the respective lights which pass through the same planar position when the transfer regions are superposed have their phases inverted relative to each other are superposed and then an exposure is carried out. Further, a plurality of transfer regions which are superposed in performing this superposition exposure are juxtaposed along the scanning direction of an exposure region of the scanning exposure over the mask.
The method of manufacture of semiconductor integrated circuit devices according to the present invention includes a step in which a plurality of transfer regions arranged on different planar positions over the same surface of the same mask are exposed onto the same region of the wafer by superposition exposure to transfer a given integrated circuit pattern over the wafer. In performing such a superposition exposure, a plurality of transfer regions which arrange identical mask patterns thereon and have groove shifters arranged such that the respective lights which pass through the same planar position when the transfer regions are superposed have their phases inverted relative to each other are superposed and then an exposure is carried out. Further, the mask pattern includes a main light transmission pattern which is transferred to the wafer and auxiliary mask patterns which are arranged in the vicinity of the main light transmission pattern and are formed in a dimension which prevents the transfer of the auxiliary mask patterns onto the wafer. In respective transfer regions to be superposed, groove shifters are arranged such that the lights which pass through the main light transmission pattern and the auxiliary mask patterns have their phases inverted relative to each other.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the groove shilters described above are constituted by substrate groove shifters which are formed by grooves formed in the mask substrate per se which constitutes the mask.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the groove shifters described above are constituted by thin film groove shifters which are formed by grooves formed in a shifter film interposed between the mask substrate and a light shielding pattern, which constitute the mask, wherein the grooves are formed such that the surface of the mask substrate is exposed.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the groove shifters described above are constituted by fine eaves type groove shifters having a structure where grooves which constitute the groove shifters reach a position below an end portion of a light shielding pattern and the end portions of the light shielding pattern are protruded.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the eaves length of the fine eaves type groove shifters is set to be equal to or less than 70% of the wavelength of the exposure light.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the eaves length of the fine eaves type groove shifters is set to be equal to or less than 40% of the wavelength of the exposure light.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, in a plurality of respective transfer regions, the mask pattern has a plurality of light transmission patterns which are disposed in parallel and close to each other and the groove shifter is arranged on either one of the light transmission patterns which are disposed close to each other.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, a process for manufacturing the mask includes a step (a) in which a resist pattern for forming grooves is formed over a mask substrate on which a light shielding pattern and a light transmission pattern are formed, a step (b) in which the resist pattern is used as a mask and then a groove is dug in the mask substrate exposed from the resist pattern so as to form a groove shifter, and a step (c) in which a phase is inspected after removing the resist pattern.
In the method of manufacture of semiconductor integrated circuit devices according to the present invention, the process for forming the groove shifter of the mask includes a step (a) in which a resist pattern for forming grooves is formed over a mask substrate on which a light shielding pattern and a light transmission pattern are formed, a step (b) in which the resist pattern is used as a mask and then a groove is dug in the mask substrate exposed from the mask so as to form a groove shifter, a step (c) in which a phase is inspected after removing the resist pattern, and a step (d) in which an isotropic wet etching processing is performed over the mask after the step (c) so as to remove the surface of the mask by etching.